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    To whom it might concern:

    My publication with John H Lau using Chris Chang was assigned wrongly to C.T.M Chang that it should be me. Can you correct it. The web site is listed as below. John H Lau was my ex-boss

    Thanks

    Chris

    http://academic.research.microsoft.com/Search?query=John%20Lau

    Wednesday, June 27, 2012 9:25 PM

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    Hello Chia-pu Chang,

    Thank you for contacting us! So that we can better address the issue, can you please let us know which publication to which you are referring? Once we have this information, we can make the necessary adjustments in our system.

    Best regards,

    Microsoft Academic Search Team

    Thursday, July 19, 2012 6:00 PM
    Moderator

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  • Question
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    Hello Chia-pu Chang,

    Thank you for contacting us! So that we can better address the issue, can you please let us know which publication to which you are referring? Once we have this information, we can make the necessary adjustments in our system.

    Best regards,

    Microsoft Academic Search Team

    Thursday, July 19, 2012 6:00 PM
    Moderator
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    Thanks

    Please refer to the publication lists as below:

    • “Nonlinear-time-dependent analysis of micro via-in-pad substrates for solder bumped flip chip applications”, Journal of Electronic Packaging, Vol. 124 No. 3, pp. 205-211, 2002

     

    • “A new thermal-fatigue life prediction model for wafer level chip scale package (WLCSP) solder joints”,  Journal of Electronic Packaging, Vol. 124 No. 3, pp. 212-220, 2002.

     

    • “Creep analysis of wafer level chip scale package (WLCSP) with 96.5Sn3.5Ag and 100In lead-free solder joints and microvia build-up printed circuit board”, Journal of Electronic Packaging, Vol. 124 No. 2, pp. 69-76, 2002.

     

    • “Characteristics and reliability of fast-flow, snap-cure, and reworkable underfills for solder bumped flip chip on low-cost substrates”, Filtration industry analyst, pp324-337, 2000: IEEE Transactions on Components, Packaging, and Manufacturing Technology, Vol. 25, No. 3, pp. 231-239, 2002.

     

    • ”Solder joint crack propagation analysis of wafer-level chip scale package on printed circuit board assemblies”, Proceedings of 50<sup>th</sup> Electronic Components and Technology Conference, Las Vegas, NV, pp. 1360-1368, May 2000: IEEE Transactions on Components, Packaging, and Manufacturing Technology, vol. 24, no. 2, pp. 285-292, 2001.

                                      

    • "DSC, TMA, DMA, and TGA of Epoxies for Fiber-Optics Transceiver Applications", ASME EPP, Vol. 1, pp. 163-168, New York, NY, Nov. 2001

     

    • “Creep analysis of solder bumped direct chip attach (DCA) on microvia build-up printed circuit board with underfill”, International Symposium on Electronic Materials and Packaging, pp.127-135, 2000.

     

    • ”Effects of underfill material properties on the reliability of solder bumped flip chip on board with imperfect underfill encapsulants ”, IEEE Transactions on Components, Packaging, and Manufacturing Technology, Vol. 23, No. 2, pp. 323-333, 2000.

     

    • “An overview of microvia technology”, Proceedings of NECON west, Anaheim, CA, pp.1221-1244, Feb. 2000: Circuit world, vol. 26, no. 2, pp. 22-32, 2000

     

    • "Taguchi Design of Experiment for Wafer Bumping by Stencil Printing", Proceedings of 50<sup>th</sup> Electronic Components and Technology Conference, Las Vegas, NV, pp.1705-1711, May 2000: IEEE Transactions on Components, Packaging, and Manufacturing Technology, Vol. 23, No. 3, pp. 219-225, 2000.

     

    • " Failure Analysis of Solder Bumped Flip Chip on Low-Cost Substrates” IEEE Transactions on Electronics Packaging Manufacturing, Vol. 23, No. 1, pp. 19-27, Jan. 2000.

     

    • " Solder Joint Reliability of Wafer Level Chip Scale Packages (WLCSP): A Time-Temperature-Dependent Creep Analysis” paper No. 99-IMECE/EEP-5, ASME, Nashville, TN, Nov. 1999: Journal of Electronic Packaging, Vol. 122, No. 4, pp. 311-316, 2000.

     

    • “Thermal-Fatigue Life of Solder Bumped Flip Chip on Micro Via-In-Pad (VIP) Low Cost Substrates”, Proceedings of NECON west, Anaheim, CA, pp.554-562, Feb. 2000.

     

    • “Characterization of underfill materials for functional solder bumped flip chips on board applications” IEEE Transactions on Components, Packaging, and Manufacturing Technology, Vol. 22, No. 1, pp. 111-119, 2000.

     

    • “Low cost flip chip soldering with No-flow underfills”, Proceedings of NECON west, Anaheim, CA, pp.563-579, Feb. 2000.

     

    • “Two side printed circuit board assembly of uBGA on RIMM<sup>TM</sup>”, Proceedings of NECON west, Anaheim, CA, pp.1172-1180, Feb. 2000.

     

    • “A low cost and reliable wafer level chip scale package”, Proceedings of NECON west, Anaheim, CA, pp.920-927, Feb. 2000.

     

    • "TMA, DMA, DSC and TGA of lead free solders", soldering & surface mount technology,Vol. 11 No. 2, pp. 17-24, 1999.

     

    • “How to select underfill materials for solder bumped flip chip on low cost substrate?” International Journal of Microcircuits & Electronic Packaging, Vol. 22 No. 1, pp.20-28, 1999. IMAPS ’98 Best Paper Award.

     

    • "Characteristics and Reliability of No-Flow Underfills for Solder Bumped Flip Chips assemblies” International Journal of Microcircuits and Electronic Packaging Vol. 22, No. 4, pp.370-381, 1999.

     

    • “Printed circuit board manufacturing and testing of RIMM<sup>TM</sup>”, Journal of Electronics Manufacturing, Vol. 9 No. 3, pp. 215-222, 1999.

     

    • “Reliable two-side printed circuit board assembly of the direct Rambus<sup>TM</sup> RIMM<sup>TM</sup> modules”, paper No. 99-IMECE/EEP-3, ASME, Nashville, TN, Nov. 1999.

     

    • “Via-in pad (VIP) substrates for solder bumped flip chip applications”, SMTA international proceedings of the Technical Program, pp.128-136, Sep. 1999.

     

    • “Design, analysis, and measurement of a novel plastic ball grid array package”, SMTA international proceedings of the Technical Program, pp.202-210, Sep. 1999.

     

    • “PCB manufacturing and testing of the direct Ranbus<sup>TM</sup> RIMM<sup>TM</sup> modules”, SMTA international proceedings of the Technical Program, pp.526-533, Sep. 1999.

     

    • “No-flow underfill for solder bumped flip chip on low-cost substrates”, Proceedings of NECON west, Anaheim, CA, pp.158-181, Feb. 1999.

     

    • "Characteristics and Reliability of No-Flow Underfills for Solder Bumped Flip Chips on low cost substrates”, Proceedings of International Symposium on Microelectronics, pp.439-449, Oct. 1999.

     

    • “Failure mechanisms of solder bumped flip chip on low-cost substrates”, International Electronics Manufacturing Technology Syposium, pp.457-472, Oct. 1999.

     

    • “A novel and reliable wafer-level chip scale package (WLCSP)”, Chip Scale International, H1-9, Sep. 1999.

     

    • “Popcorning analysis of plastic ball grid array packages by strain-gage measurement, tomographic acoustic micro imaging, and fracture mechanics”, Proceedings of NECON west, Anaheim, CA, pp.1161-1174, Feb. 1999.

     

    • “SMT compatible no-flow underfill for solder bumped flip chip on low-cost substrates” Journal of Electronics Manufacturing, Vol. 8 No. 3&4, pp. 151-164, 1998.

     

    • “Delamination analysis of plastic packages during solder reflow by strain-gage measurement and tomographic acoustic micro imaging methods” Journal of Electronics Manufacturing, Vol. 8 No. 3&4, pp. 165-172, 1998.

     

    • “Low-cost solder-bumped chip scale package” Electronic Packaging & Production, pp. 74-78, Nov. 1998.

     

    • “A low-cost solder-bumped chip scale package-NuCSP”, Circuit world, vol. 24, no. 3, pp. 11-25, 1998.

     

    • “Real-time popcorn analysis of plastic ball grid array packages during solder reflow”, International Electronics Manufacturing Technology Symposium, pp.455-463, Oct. 1998.

     

    • “Effects of underfill encapsulant on the mechanical and electrical performance of a functional flip chip device”, Journal of Electronics Manufacturing, Vol. 7 No. 4, pp. 269-277, 1997

    Other than the lists above, I also used C. P . Chang for the publications listed as below

    • “Polyphosphazene toughened PMR-type thermosets”, High Performance Polymer, 8(1996) pp. 455-473

     

    • “The effect of transcrystallinity on interfacial adhesion of poly(ether-ether ketone) composites”, 2<sup>th</sup> International Conference on Composites Engineering, pp. 115-116, Aug. 1995.

     

    • “Space environmental effects on polymer composites: research needs and opportunities”, Proceedings of NASA conference, pp. 319-333, Oct. 1992.

     

    • “Aspects of erosional wear behavior during tumbling of BaTiO<sub>3</sub> dielectric ceramics”, Wear, 147 (1991) pp.345-353.

     

    • “A case study on improvement of electrical properties on compact CMC X7R via Taguchi experimental design”, Proceedings of the 4<sup>th</sup> Sino-Korea Quality Symposium, pp. 243-261, 1990.

    The other Chris Chang recently is in

    • “Microcup Electronic Paper and the Converting Processes", ASID 2004 Paper 10.1.2

    Thanks

    Chris

    Wednesday, July 25, 2012 11:56 PM